The present invention relates to a CMOS (Complementary Metal Oxide Silicon) image sensor; and, more particularly, to an image sensor integrated into one chip, together with a memory.
Generally, a CCD (charge coupled device) image sensor has many demerits in that complicated operation methods, large power consumption and a number of mask processes are required. Furthermore, it is very difficult to make a signal processing circuit integrated into a CCD chip. Accordingly, in order to overcome such demerits, many developments for a CMOS image sensor have been recently ensued using a submicron CMOS manufacturing technique. A CMOS image sensor creates a picture by detecting signals from photodiodes and MOS transistors formed within a unit pixel. The use of a CMOS manufacturing technique can reduce power consumption compared with a CCD, which requires 30 to 40 mask processes, the CMOS image sensor only approximately 20 mask processes are required, thereby simplifying the manufacturing process. Furthermore, since an image signal processing circuit is integrated together with light sensing elements in one chip, it is highlighted as a next generation image sensor.
The integration of a pinned photodiode and a CMOS circuit is disclosed in U.S. patent application Ser. No. 09/258,814 filed on Feb. 26, 1999, entitled xe2x80x9cCMOS Image Sensor with Equivalent Potential Diode and Method for Fabricating the Samexe2x80x9d which is pending. In the U.S. patent application Ser. No. 09/258,814, a method for maximizing the production and quantum efficiency of photoelectric charges generated by incident light and the transfer efficiency to transfer the photoelectric charges to a sensing node is disclosed.
On the other hand, U.S. Pat. No. 5,459,508, entitled xe2x80x9cImage Processing Apparatus,xe2x80x9d discloses an apparatus for electrically recording image data, by implementing a memory control system which stores data outputted from image sensors in DRAM chips of, at least, more than 1.
However, in the conventional image sensor, since memories, such as DRAMs, and the image sensors are manufactured on different chips from each other, the use of the separate chips makes the miniaturization of the image system difficult, manufacturing cost more expensive, despite the use of a CMOS manufacturing technique, and even the power consumption is not remarkably reduced.
It is, therefore, an object of the present invention to provide a CMOS image sensor integrated together with a memory device in order to minimize a system to which the CMOS image sensor is applied and reduce the cost and power consumption.
In accordance with an aspect of the present invention, there is provided a CMOS image sensor comprising: a pixel array formed on a chip, having a plurality of unit pixels; a logic circuit formed on the chip to process signals from the pixel array; and a memory formed on the chip to store outputs from the logic circuit, wherein the pixel array, the logic circuit and the memory are isolated from each other by insulating layers, whereby the pixel array, the logic circuit and the memory are integrated on the same chip.
In accordance with another aspect of the present invention, there is provided a CMOS image sensor comprising: a chip divided into first to third sections; a unit pixel array formed on the first section; a logic circuit formed on the second section to process signals form the pixel array; and a memory formed on the third section to store outputs from the logic circuit, wherein the first to third sections are isolated from each other by insulating layers.